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DSD 2025: Euromicro Conference on Digital System Design

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Día de Entrega:
2025-06-02
Fecha de Notificación:
2025-06-20
Fecha de conferencia:
2025-09-10
Ubicación:
Salerno, Italy
Ediciones:
28
ICORE: C   QUALIS: B1   Vistas: 29703   Seguidores: 0   Asistentes: 0

Índice Conference Partner (CP-I)

61,7 / 100
Puesto n.º 523 de 5.647 congresos · 10% superior
Reconocimiento académico (35%)
78
Selectividad en la revisión (20%) Sin datos: se puntúa con la línea base neutra de 50 —
Ediciones celebradas (20%)
91
Atención de la comunidad (10%)
10
Integridad del registro público (15%)
35

Datos utilizados: Categorías: ICORE C, QUALIS B1 · Ediciones documentadas: 28 · Investigadores que abrieron esta página en los últimos 24 meses: 3

Falta en el registro público: Tasas de aceptación históricas (+4,5) · Ediciones anteriores (+3,0) · Premios al mejor artículo (+2,3)
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Confianza 80 %: la parte de la puntuación respaldada por datos observados y no por la línea base neutra. Cómo se calcula esta puntuación · Ver la clasificación · Versión del algoritmo 1.1 · Calculado el 2026-09-02

Solicitud de Artículos

DSD 2025 (Euromicro Conference on Digital System Design) is a ICORE C / QUALIS B1 conference held in Salerno, Italy on 2025-09-10. The paper submission deadline is 2025-06-02. Acceptance notifications are sent on 2025-06-20.

The Euromicro Conference on Digital System Design (DSD) addresses all aspects of (embedded, pervasive and high-performance) digital and mixed HW/SW system development and covers the entire design process from specification to microarchitectures, digital circuits and VLSI implementations. It is a forum for researchers and engineers from academia and industry working on advanced research, development and applications. It focuses on the current and future challenges of: advanced embedded, high-performance and cyber-physical applications; system and processor architectures for embedded and high performance HW/SW systems; design methodology and design automation for all design levels of embedded, high performance and cyber-physical systems; modern implementation technologies ranging from full-custom circuits in nanometer technology nodes to FPGAs and MPSoC infrastructures. Authors are cordially invited to submit their work on (but not limited to) the topics of the main track of the conference. In addition, contributions to various special sessions (with dedicated coordinators and sub-program committees) on specific topics of special interest are welcome. All papers will be reviewed according to common guidelines, quality requirements and acceptance thresholds. Main Topics Artificial intelligence from edge to cloud: architectures, methods, tools and applications Design and synthesis of systems, hardware and embedded software – specification, modelling, analysis, validation and testing Design automation at system, processor, register-transfer, logic and physical levels Formal methods in system and hardware design IoT, cyber-physical, embedded systems and applications Systems-on-a-chip, networks-on-a-chip and systems-in-a-package High-performance, energy-efficient multi-core and many-core (heterogeneous) processor architectures. Autonomous/adaptable/reconfigurable systems and architectures Security, safety, reliability and multi-objective optimization of embedded and cyber-physical systems Future trends, new applications and new technologies
Última actualización por Dou Sun el

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