会議情報
CHES 2025: International Conference on Cryptographic Hardware and Embedded Systems
https://ches.iacr.org/2025/
提出日:
2025-04-15
通知日:
2025-06-15
会議日:
2025-09-14
場所:
Kuala Lumpur, Malaysia
年:
27
CCF: b   CORE: a   QUALIS: a1   閲覧: 56026   追跡: 56   出席: 4

論文募集
Having been established in 1999, the Cryptographic Hardware and Embedded Systems (CHES) conference is the premier venue for research on both design and analysis of cryptographic hardware and software implementations. As an area conference of the International Association for Cryptologic Research (IACR), CHES bridges the cryptographic research and engineering communities, and attracts participants from academia, industry, government and beyond. CHES 2025 will take place in Kuala Lumpur, Malaysia in September 14-18, 2025. The conference website is accessible at
https://ches.iacr.org/2025

The scope of CHES is intentionally diverse, meaning we solicit submission of papers on topics including, but not limited to, the following:

Cryptographic implementations:

    Hardware architectures
    Cryptographic processors and coprocessors
    True and pseudorandom number generators
    Physical unclonable functions (PUFs)
    Efficient software implementation
    SHARCS (Special-purpose HARdware for Cryptanalysis, quantum included)

Attacks against implementations, and countermeasures:

    Remote, micro-architectural and physical side-channel attacks and countermeasures
    Fault attacks and countermeasures
    Hardware tampering and tamper-resistance
    White-box cryptography and code obfuscation
    Reverse engineering of hardware/software
    Hardware trojans and countermeasures

Tools and methodologies:

    Formal methods, techniques and tools for secure design and verification for hardware/software
    Computer aided cryptographic engineering
    Domain-specific languages for cryptographic systems
    Metrics for the security of embedded systems
    FPGA design security
    Physical assurance and analysis of embedded systems

Systematization of Knowledge (SoK)

Interactions between cryptographic theory and implementation issues:

    Quantum cryptanalysis
    Algorithm subversion and subversion prevention
    New and emerging cryptographic algorithms and protocols targeting embedded devices
    Theoretical hardware models that allow proofs

Applications:

    RISC-V security
    Trusted execution environments and trusted computing platforms
    IP protection for hardware/software and technologies for anti-counterfeiting
    Reconfigurable hardware for cryptography
    Secure elements, security subsystems, and applications
    Security for the Internet of Things and cyberphysical systems (RFID, sensor networks, smart meters, medical implants, smart devices for home automation, industrial control, automotive, etc.)
    Secure storage devices (memories, disks, etc.)
    Isolation and monitoring hardware for cyberresilience
    Engineering of zero-knowledge proof systems
    Privacy-preserving computing in practice (MPC, FHE)
    Post-quantum security
最終更新 Dou Sun 2024-11-23
合格率
時間提出受け入れ受け入れ(%)
20141273326%
20131322720.5%
20121203226.7%
20111193226.9%
20101083027.8%
20091482919.6%
20081072725.2%
2007993131.3%
20061123228.6%
20051083229.6%
20041253225.6%
20031113228.8%
20021013938.6%
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関連仕訳帳
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