Conference Information
ETS 2025: European Test Symposium
https://ets2025.taltech.ee/Submission Date: |
2024-12-01 |
Notification Date: |
2025-02-14 |
Conference Date: |
2025-05-26 |
Location: |
Tallinn, Estonia |
Years: |
30 |
CCF: c QUALIS: b2 Viewed: 28800 Tracked: 36 Attend: 3
Call For Papers
The IEEE European Test Symposium (ETS) is Europe's premier forum dedicated to presenting and discussing scientific results, emerging ideas, applications, hot topics and new trends in the area of electronic-based circuits and system testing, reliability, security and validation. In 2025, ETS will take place in Swissotel in Tallinn. The city is known for the picturesque Old Town with its medieval architecture. It is organized by the Tallinn University of Technology (TalTech), which co-sponsors the event jointly with the IEEE Council on Electronic Design Automation (CEDA). In addition to scientific paper submissions, ETS offers a track for informal contributions dedicated to early hot ideas and relevant case studies as well as a PhD forum. A Test Spring School and Fringe Workshops will be organized in conjunction with ETS'25. This year we will celebrate the anniversary 30th edition of ETS! You are invited to participate and submit your contributions to ETS'25. The areas of interest include (but are not limited to) the following topics: 3D IC and SiP Test Analog, Mixed-signal and RF Test Approximate Circuit Testing ATE Hardware and Software Automatic Test Generation Automotive and Avionics Test Board Test and Diagnosis Built-In Self-Test Current-Based Test Defect-Based Test Delay and Performance Test Dependability Design for Test DfX (Design for Manufacturing, Reliability, Yield, etc.) Diagnosis and Silicon Debug Economics of Test Extra-Functional Aspects Failure Analysis Fault Modeling Fault Simulation Fault Tolerance Functional Safety Hardware Security Heterogeneous and Emerging Architectures High-Speed I/0 Test IoT and CPS Dependability Low-Power Test Machine Learning and Test Memory Test and Repair Microsystems / MEMS / Sensors Test On-line Test Power- / Thermal-Aware Test Processor Test (Multi-Core, GPU, CPU, Neuromorphic, etc.) Security-Test Trade-offs Self-X (Awareness, Repair, Test, etc.) Signal Integrity Test SoC and NoC Test Standards in Test Test for Reversible and Quantum Circuits Test of Reconfigurable Systems (FPGA, CPLD, etc.) Test, Reliability and Security of Emerging Technologies Trojan Detection Verification and Validation Yield Analysis and Enhancement
Last updated by Dou Sun in 2024-10-02
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